Power Integrity (PI)

We propose optimizations for the power source and ground wiring, in order to ensure the stable operation of devices with higher speeds and lower voltage.


Increased device speeds and reduced voltage has had an impact on signal integrity (SI), as well as noise from the power source and ground wiring, and on signal behavior. Design and analysis technologies for these phenomena are vital for optimization.


  • PI and SI analysis, taking the power system into account when considerations of SI alone are insufficient
  • Analysis conducted in an environment integrating the board, package, and chip
  • Take more effective measures by visualizing power impedance and resonance characteristics

Analysis services

Impedance and resonance analysis of the power-source plane
  • Optimization of plane shape and layer composition
  • Optimization of capacitor layout (position and number)

IR drop analysis
  • Optimization of power-source wiring channels and shape
    (Confirm voltage and current distribution)

Simultaneous switching noise analysis
  • Simultaneous switching noise analysis
  • Reduction of impedance in the power-source plane
  • Optimization of decoupling capacitor

Sample analysis

Buffer 8-bit simultaneous operation: reducing voltage fluctuations through capacitor optimization