PCI Express (Peripheral Component Interconnect Express, also known as PCIe) is a high-speed data transfer interface standard used inside computers and servers.Originally developed as an improvement on the PCI bus from the 1990s, this technology is now widely adopted as the core connection method in modern computer systems.
A key feature of PCIe is its use of serial communication method.This allows for increased data transfer speeds by combining multiple lanes, enabling more efficient communication compared to traditional parallel communication methods.
Major applications of PCIe include graphics boards (GPUs), NVMe-compatible SSDs, and network cards, making it an indispensable standard for maximizing the performance of target devices.
PCIe offers the following technical advantages that are essential for today’s computer systems.
Each of these will be explained in detail below.
High-speed data transfer is PCIe’s greatest advantage, offering outstanding data transfer rates. PCIe continues to evolve, with each generation achieving significant improvements in data transfer speeds.
For example, PCIe Gen4 offers speeds of approximately 16 GT/s (GigaTransfers per second) per lane, and the latest PCIe Gen5 reaches up to 32 GT/s per lane.
This high-speed capability allows you to maximize the performance of devices that require high throughput, such as SSDs and GPUs.
PCIe Generations and Transfer Rates
One of the major strengths of PCIe is its design flexibility, which allows it to connect a wide variety of expansion cards and devices.
PCIe supports a wide range of devices, from low-bandwidth to high-bandwidth requirements, by allowing the number of lanes to be adjusted as needed through a single socket.
Additionally, by utilizing a switch mechanism to efficiently manage multiple connections, PCIe can optimize connectivity between devices and enable the use of multiple devices through a single socket.
This enables flexible configurations tailored to the performance requirements of individual users.
Furthermore, PCIe is backward compatible. For example, a PCIe 4.0-compatible card can be inserted into a PCIe 3.0 slot and used, although it will work at the lower 3.0 transfer speed.
Also, physically smaller cards (such as ×1) can be inserted into larger slots (such as ×16).
Minimizing latency and ensuring reliability are extremely important in computer systems.PCIe features a high-performance error checking mechanism that efficiently detects and retransmits errors during data transmission to maintain communication integrity.This mechanism ensures a very low error rate and high reliability during data transfer.Furthermore, its serial communication method reduces latency compared to conventional parallel communication methods, making PCIe ideal for applications requiring real-time processing and high-load computing.These characteristics make PCIe a widely used interface in industrial equipment and high-end systems.
PCIe plays a major role in PCB (Printed Circuit Board) design of current computers and electronic devices as a high-speed, high-performance communication interface. As described below, efficient layout is of primary importance in design, and attention must also be paid to ensuring expandability and scalability.
Each of these will be explained in an easy-to-understand manner.
As mentioned earlier, the latest generation, PCIe Gen5, achieves an impressive data transfer rate of up to 32 GT/s per lane.To fully leverage this performance, the following factors must be considered.
PCIe employs serial communication using differential signaling, which is inherently resistant to external noise and is well-suited for high-speed data transfer.Each PCIe lane consists of a transmit and receive pair, enabling full-duplex communication.Therefore, careful design of these differential traces is necessary to maintain signal integrity.
In PCB design for PCIe, it is important to maintain flexibility to accommodate future system expansion.PCIe enables bandwidth expansion by increasing the number of lanes (×1, ×4, ×8, ×16, etc.), so it is desirable to secure routing paths during PCB design stage that allow for potential lane expansion in the future.
When implementing high-speed PCIe on PCB, it is essential to prevent unexpected malfunctions.Performing simulations during PCB design stage is crucial for identifying and addressing potential issues with signal quality and power quality in advance.Simulation has become indispensable in the development of PCBs that handle high-speed signals.
In generations exceeding 10 GT/s, such as PCIe Gen4 and later, signal quality degradation due to reflections becomes a significant concern. Therefore, impedance matching of not only traces but also pads and vias for component is important.Optimizing these impedance matching conditions requires a simulation using 3D electromagnetic field analysis, which is necessary to accurately represent the characteristics of the PCB
Furthermore, by combining PCB model with device models such as IBIS-AMI for signal waveform simulation, it is possible to maximize the high-speed performance of PCIe.
PCIe Gen4 Signal Waveform
As CPUs and FPGAs continue to evolve toward lower voltages and higher currents, the margin required for stable device operation has decreased.Therefore, ensuring power supply quality is a critical consideration at PCB design stage.The primary items verified in PI simulation are PDN impedance and voltage drop (IR drop).
PDN Impedance Analysis: |
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Optimize the capacity and number of capacitors |
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Voltage Drop (IRDrop) Analysis: |
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Review the power plane design if the voltage drop is large. |
PDN impedance
Voltage Drop (IRDrop)
When incorporating PCIe into PCB design, several factors must be considered to ensure communication quality and reliability.The following four points are particularly important.
Each of these points will be explained in detail below.
PCIe performs data communication in parallel across multiple lanes. If the lengths of these traces are not consistent, signal timing issues may occur, potentially leading to communication errors.To maintain consistency, it is essential to adjust the traces to a uniform length.When using folded wiring, commonly known as meander wiring, to adjust timing, it is necessary to avoid coupling with surrounding traces by maintaining adequate spacing between adjacent differential traces and ensuring that the wiring does not approach itself (same net) too closely.Additionally, any differences in the lengths of the positive and negative (Posi/Nega) differential traces can cause phase differences, so it is crucial to precisely align the lengths of the differential pairs.
Meander Wiring
Meander Wiring for PCIe
Impedance matching is extremely important for high-speed signals such as PCIe to minimize reflections and ensure signal integrity.PCIe typically requires differential impedance to be managed at 85Ω or 100Ω.
The four factors that determine characteristic impedance are as follows.
PCB designers must carefully consider these factors and use simulation tools to accurately calculate and adjust impedance as required.
In PCB design for PCIe, a stable power supply is essential for high-speed signal communication.Design for power traces and decoupling are important for ensuring power supply stability in line with high-speed device operation.
Power planes must be designed to efficiently supply power to multiple devices while minimizing power supply spike noise. Decoupling, meanwhile, plays a key role in preventing voltage fluctuations when PCIe devices suddenly demand large currents due to high-speed switching operations. Proper placement of decoupling capacitors absorbs high-frequency signals, thus maintaining both power and signal integrity.
In PCB design, capacitors with appropriate capacitance should be placed near each device to help the power supply circuit achieve stable PDN impedance.
Furthermore, when designing the power plane, structures and layouts that consider both low impedance and noise suppression are recommended.
Layer Configuration and Microstrip
It is essential to consider electromagnetic compatibility (EMC) in the design of PCBs implementing PCIe, where high-frequency signals are used.The following measures are taken for PCB design.
These measures will help minimize electromagnetic interference and enable a design that does not interfere with the operation of other electronic devices.
While PCIe is a high-performance communication interface, it also presents many design challenges due to its high-speed signals.To address these issues and maximize PCB performance, the following two aspects are considered essential.
Each method will be explained in detail.
It’s essential to take a systematic approach from the early stages of design to address these issues and maximize PCB performance.
PCIe devices generally require a large and stable power supply.If the power distribution design on the PCB is insufficient, it may cause operational problems such as voltage drops and thermal issues.The following points should be carefully considered when designing the power supply for PCBs.
The behavior of PCIe signals depends on the accuracy of the reference clock. Unstable clock signals can cause communication errors and performance degradation, so proper design and management of the clock signal are crucial. Specifically, the following points should be considered.
These measures enable reliable operation while maintaining the high-speed communication performance of PCIe.
PCIe add-in cards equipped with the latest FPGA play an important role in enhancing processing performance for AI acceleration, HPC (high-performance computing), networking, and other applications.However, there are many challenges in designing PCBs that incorporate high-performance FPGAs used in these applications.In particular, the latest FPGAs have high pin counts—with some packages exceeding 2,000 pins—requiring an increased number of signal layers in PCBs.
As a result, it has become difficult to maintain the PCIe add-in card thickness standard of 1.57mm.To address this challenge, we at OKI Circuit Technology offer "Composite Thickness Structure PCBs."This structure allows the board edge thickness to be maintained at 1.57mm, while areas mounting FPGAs or high-performance circuits can be configured to different thicknesses, such as 3.2mm.In addition, we support low-dielectric materials for high-speed transmission (e.g., Megtron6 by Panasonic), ensuring both signal integrity and high-speed performance. This enables flexible implementation of the latest, high-performance FPGAs in PCIe add-in cards.
PCIe has become a core technology in modern computer systems due to its high speed,flexible scalability, and high reliability.While the technology continues to evolve rapidly and the latest standards are constantly being adopted, it is important to note that PCIe maintains compatibility with previous generations.
There are many important aspects to consider when designing PCBs for high-speed PCIe implementation. Proper management of these aspects makes it possible to achieve high-quality PCBs that maximize PCIe performance.
Potential issues can be detected and addressed in advance by performing SI and PI simulations during the PCB design stage. Therefore, we recommend utilizing simulations in your design process.
OKI Circuit Technology has extensive experience and a proven track record in this field.